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18-Line SCSI Terminator
IMP5226
LIN DOC # : 5226
DESCRIPTION
The IMP5226 SCSI terminator is part of IMP's family of high-performance, adaptive, non-linear mode SCSI products, which are designed to deliver true UltraSCSI performance in SCSI applications. The low-voltage BiCMOS architecture employed in its design offers performance superior to older linear passive and active techniques. IMP's architecture employs high-speed adaptive elements for each channel, thereby providing the fastest response possible -- typically 35MHz, which is 100 times faster than the older linear regulator/terminator approach used by other manufacturers. Products using this older linear regulator approach have bandwidths which are dominated by the output capacitor and which are limited to 500KHz (see further discussion in the Functional Description section). The IMP architecture also eliminates the output compensation capacitor required in earlier terminator designs. Each is approved for use with SCSI-1, -2, -3, UltraSCSI and beyond -- providing the highest performance alternative available today. The IMP5226 architecture is much more tolerant of marginal system integrations. A key improvement offered by the IMP5226 lies in its ability to insure reliable, error-free communications even in systems which do not adhere to recommended SCSI hardware design guidelines, such as the use of improper cable lengths and impedances. Frequently, this situation is not controlled by the peripheral or host designer and, when problems occur, they are the first to be made aware of the problem. To enter the disconnect mode, the disconnect pin must be driven high, thereby disconnecting the IMP5226 from the SCSI bus. Quiescent current is typically less than 200A in this mode, while the output capacitance is less than 3pF. Reduced component count is also inherent in the IMP5226 architecture. Traditional termination techniques require large stabilization and transient protection capacitors of up to 20F in value and size. The IMP5226 architecture does not require these components, allowing all the cost savings associated with inventory, board space, assembly, reliability, and component costs. The IMP5226 is a superior pin-for-pin replacement for the LX5207, the UC5601/ 5602/5608/5610/5618 and the Burr Brown REG5608/5618.
KEY FEATURES
s ULTRA-FAST RESPONSE FOR FAST-20 SCSI APPLICATIONS s 35MHz CHANNEL BANDWIDTH s 3.3V OPERATION s LESS THAN 3pF (TYP.) OUTPUT CAPACITANCE s SLEEP-MODE CURRENT LESS THAN 200A s THERMALLY SELF-LIMITING s NO EXTERNAL COMPENSATION CAPACITORS s COMPATIBLE WITH ACTIVE NEGATION DRIVERS (60mA / CHANNEL) s COMPATIBLE WITH PASSIVE AND ACTIVE TERMINATIONS s APPROVED FOR USE WITH SCSI 1, 2, 3 AND ULTRA SCSI s HOT-SWAP COMPATIBLE s PIN-FOR-PIN COMPATIBLE WITH LX5207, UC5601/5602/5610/5618 AND BURR BROWN REG5608/5618
PRODUCT HIGHLIGHT
R E C E I V I N G WAV E F O R M - 20MH Z
D R I V I N G WAV E F O R M - 20MH Z
Receiver 1 Meter, AWG 28
DISCONNECT
Driver IMP 5226
DISCONNECT
IMP 5226 LX5268 LX5268
PACKAGE ORDER INFORMATION TA (C) 0 to 70
DB Plastic SSOP
28-pin
IMP5226CDB
DWP Plastic SOWB
28-pin, Power
IMP5226CDWP
Note: All surface-mount packages are available in Tape & Reel. Append the letter "T" to part number. (i.e. IMP5226CDWPT)
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ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE PIN OUTS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15
ULTRA 18-LINE SCSI TE M TermPwr Voltage .......................................................................................................R+7VI N A T O R DISCONNECT Signal Line Voltage ........................................................................................... 0V to +7V T1 Regulator Output Current .......................................................................................... 1.2A T2 Operating Junction Temperature T3 T4 Plastic (DB, DWP Packages) ............................................................................... 150C T5 Storage Temperature Range ...................................................................... -65C to 150C H.S./GND Lead Temperature (Soldering, 10 seconds) .............................................................. 300C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal.
GND H.S./GND T6 T7 T8 T9 VTERM
THERMAL DATA
DB PACKAGE:
GND T18 T17 T16 T15 T14 H.S./GND H.S./GND H.S./GND T13 T12 T11 T10 N.C.
THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA ................... 117C/W
DWP PACKAGE:
DB PACKAGE (Top View)
DISCONNECT T1 T2 T3 T4 T5 HEAT SINK/GND GND HEAT SINK/GND T6 T7 T8 T9 VTERM
1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15
Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow.
THERMAL RESISTANCE-JUNCTION TO LEADS, JL ............................ 18C/W THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA ..................... 40C/W
GND T18 T17 T16 T15 T14 HEAT SINK/GND HEAT SINK/GND HEAT SINK/GND T13 T12 T11 T10 N.C.
DWP PACKAGE (Top View)
RECOMMENDED OPERATING CONDITIONS (Note 2) Parameter
Termpwr Voltage Signal Line Voltage Disconnect Input Voltage Operating Virtual Junction Temperature Range IMP5226C Note 2. Range over which the device is functional.
Symbol
VTERM
Recommended Operating Conditions Min. Typ. Max.
3.0 0 0 0 5.5 5 VTERM 125
Units
V V V C
ELECTRICAL CHARACTERISTICS
Term Power = 4.75V unless otherwise specified. Unless otherwise specified, these specifications apply at the recommended operating ambient temperature of TA = 25C. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.
Parameter
Output High Voltage TermPwr Supply Current
Symbol
VOUT ICC
Test Conditions
All data lines = open All data lines = 0.5V DISCONNECT Pin > 2.0V VOUT = 0.5V DISCONNECT Pin = 0V DISCONNECT Pin = 4.75V DISCONNECT Pin = > 2.0V, VO = 0.5V VOUT = 0V, frequency = 1MHz VOUT = 4V
Min.
2.65 10
IMP5226 Typ. Max.
2.85 400 200 -23 -90 10 10 3 35 60 18 450 -24
Units
V mA mA A mA A nA nA pF MHz mA
Output Current DISCONNECT Input Current Output Leakage Current Capacitance in DISCONNECT Mode Channel Bandwidth Termination Sink Current, per Channel
IOUT IIN IOL COUT BW ISINK
-21
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FUNCTIONAL DESCRIPTION
ULTRA 18-L on assertion and N A T O R Cable transmission theory suggests that in order to optimize I N E S C S I T E R M Iby imposing 2.85V on deassertion. In order to disable the device, the DISCONNECT pin must be driven logic signal speed and quality, the termination should act both as an High. This mode of operation places the device in a sleep state ideal voltage reference when the line is released (deasserted) and where a meager 200A of quiescent current is consumed. as an ideal current source when the line is active (asserted). Additionally, all outputs are in a Hi-Z (impedance) state. Sleep Common active terminators, which consist of Linear Regulators mode can be used for power in series with resistors (typically POWER UP / POWER DOWN FUNCTION TABLE conservation or to completely 110), are a compromise. As the eliminate the terminator from the line voltage increases, the amount of Quiescent SCSI chain. In the second case, current decreases linearly by the DISCONNECT Outputs Current termination node capacitance is equation V = I * R. The IMP5226, important to consider. The with its unique new architecture, L Enabled 10mA terminator will appear as a parasitic applies the maximum amount of H HI Z 200A distributed capacitance on the line, current regardless of line voltage Open HI Z 200A which can detract from bus perforuntil the termination high threshold mance. For this reason, the (2.85V) is reached. IMP5226 has been optimized to have only 4pF of capacitance per Acting as a near ideal line terminator, the IMP5226 closely output in the sleep state. reproduces the optimum case when the device is enabled. To An additional feature of the IMP5226 is its compatibility with enable the device a DISCONNECT pin must be pulled Logic active negation drivers. The device handles up to 60mA of sink Low. During this mode of operation, quiescent current is 6mA current for drivers which exceed the 2.85V output high. and the device will respond to line demands by delivering 24mA
BLOCK DIAGRAM
FIGURE 1 -- IMP5226 BLOCK DIAGRAM
TERM POWER
THERMAL LIMITING CIRCUIT
CURRENT BIASING CIRCUIT
24mA CURRENT LIMITING CIRCUIT
DATA OUTPUT PIN DB(0)
V TERM
2.85V
DISC
DISCONNECT
1.4V 1 OF 18 CHANNELS
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PACKAGE DIMENSIONS
U LT R A 1 8 - L I N E S C S I TE R M I N AT O R
DWP
28-Pin Plastic SOWB POWER
28
A
15
B
1 14
P
F
G
D L C M
SEATING PLANE
K
J
DIM A B C D F G J K L M P
MILLIMETERS MIN MAX 17.73 17.93 7.40 7.60 2.44 2.64 0.36 0.46 0.51 1.01 1.27 BSC 0.123 0.32 0.10 0.30 8.13 8.64 0 8 10.26 10.65
INCHES MIN MAX 0.698 0.705 0.291 0.299 0.096 0.104 0.014 0.018 0.020 0.040 0.050 BSC 0.005 0.013 0.004 0.012 0.320 0.390 0 8 0.404 0.419
DB
28-Pin Shrink Small Outline Package (SSOP)
EP
123
D F
AH
E
SEATING PLANE
B
G
L
C
M
DIM A B C D E F G H L M P
MILLIMETERS MIN MAX 1.73 1.99 0.25 0.38 0.13 0.22 10.07 10.33 5.20 5.38 0.65 BSC 0.05 0.21 1.63 1.83 0.65 0.95 0 8 7.65 7.90
INCHES MIN MAX 0.068 0.078 0.009 0.015 0.005 0.008 0.396 0.407 0.205 0.212 0.025 BSC 0.002 0.008 0.064 0.072 0.025 0.037 0 8 0.301 0.311
IMP, Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134 Tel: 408.432.9100 Main Tel: 800.438.3722 Fax: 408.434.0335 Fax-on-Demand: 800.249.1614 (USA) Fax-on-Demand: 303.575.6156 (International) e-mail: info@impinc.com http://www.impweb.com
The IMP logo is a registered trademark of IMP, Inc. All other company and product names are trademarks of their respective owners.
(c) 1998 IMP, Inc. Printed in USA Part No.: IMP5226 Document Number: IMP5226-03-4/98
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